HAL RCC constants migration

This section provides information about the HAL RCC constants migration, followed by the HAL CRS constants migration.

Note

The available system clock sources may vary between STM32 series. The examples provided in this section are based on the STM32U5 series.

HAL RCC HSE configuration

HAL1

HAL2 

#define RCC_HSE_OFF




#define RCC_HSE_ON
#define RCC_HSE_BYPASS
#define RCC_HSE_BYPASS_DIGITAL

Removed; use HAL_RCC_HSE_Disable() instead. 



typedef enum
{
 HAL_RCC_HSE_ON,
 HAL_RCC_HSE_BYPASS,
 HAL_RCC_HSE_BYPASS_DIGITAL
} hal_rcc_hse_t;

Related concept:

HAL RCC LSE configuration

HAL1

HAL2 

#define RCC_LSE_OFF




#define RCC_LSE_ON_RTC_ONLY
#define RCC_LSE_ON
#define RCC_LSE_BYPASS_RTC_ONLY
#define RCC_LSE_BYPASS

Removed; use HAL_RCC_LSE_Disable() instead. 



typedef enum
{
 HAL_RCC_LSE_ON_RTC_ONLY,
 HAL_RCC_LSE_ON,
 HAL_RCC_LSE_BYPASS_RTC_ONLY,
 HAL_RCC_LSE_BYPASS
} hal_rcc_lse_t;

Related concept:

HAL RCC items

HAL1

HAL2 

#define RCC_HSI
#define RCC_HSE
#define RCC_LSI
#define RCC_LSE
#define RCC_SYSCLK
#define RCC_PRESC
#define RCC_PLL1
#define RCC_PLL2
#define RCC_HSI48
#define RCC_RMVF
#define RCC_ALL

#define RCC_HSI
#define RCC_HSE
#define RCC_LSI
#define RCC_LSE
#define RCC_SYSCLK
#define RCC_PRESC
#define RCC_PLL1
#define RCC_PLL2
#define RCC_HSI48
#define RCC_RMVF
#define RCC_ALL

HAL RCC LSI configuration

HAL1

HAL2 



#define RCC_LSI_DIV1
#define RCC_LSI_DIV128

typedef enum
{
  HAL_RCC_LSI_DIV1,
  HAL_RCC_LSI_DIV128
} hal_rcc_lsi_div_t;

Related concept:

HAL RCC LSI configuration

HAL1

HAL2 

#define RCC_LSI_ON
#define RCC_LSI_OFF

Removed

HAL RCC HSI configuration

HAL1

HAL2 

#define RCC_HSI_ON
#define RCC_HSI_OFF
#define RCC_HSICALIBRATION_DEFAULT

Removed

#define HAL_RCC_HSICALIBRATION_DEFAULT

HAL RCC HSI48 configuration

HAL1

HAL2 

#define RCC_HSI48_ON
#define RCC_HSI48_OFF

Removed

HAL RCC MSI configuration

HAL1

HAL2 

#define RCC_MSI_ON
#define RCC_MSI_OFF
#define RCC_MSICALIBRATION_DEFAULT

Removed

#define HAL_RCC_MSICALIBRATION_DEFAULT

HAL RCC MSIK configuration

HAL1

HAL2 

#define RCC_MSIK_ON
#define RCC_MSIK_OFF

Removed

HAL RCC PLL configuration

HAL1

HAL2 

#define RCC_PLL_ON
#define RCC_PLL_OFF
#define RCC_PLL_NONE

Removed

HAL RCC SHSI configuration

HAL1

HAL2 

#define RCC_SHSI_ON
#define RCC_SHSI_OFF

Removed

HAL RCC peripheral clock selection

HAL1

HAL2 

#define RCC_PERIPHCLK_USART1
#define RCC_PERIPHCLK_USART2
#define RCC_PERIPHCLK_USART3
#define RCC_PERIPHCLK_USART6
#define RCC_PERIPHCLK_USART10
#define RCC_PERIPHCLK_USART11
#define RCC_PERIPHCLK_UART4
#define RCC_PERIPHCLK_UART5
#define RCC_PERIPHCLK_UART7
#define RCC_PERIPHCLK_UART8
#define RCC_PERIPHCLK_UART9
#define RCC_PERIPHCLK_UART12
#define RCC_PERIPHCLK_LPUART1
#define RCC_PERIPHCLK_LPUART2
#define RCC_PERIPHCLK_I2C1
#define RCC_PERIPHCLK_I2C2
#define RCC_PERIPHCLK_I2C3
#define RCC_PERIPHCLK_I2C4
#define RCC_PERIPHCLK_I2C5
#define RCC_PERIPHCLK_I2C6
#define RCC_PERIPHCLK_I3C1
#define RCC_PERIPHCLK_I3C2
#define RCC_PERIPHCLK_I2S
#define RCC_PERIPHCLK_I2S2
#define RCC_PERIPHCLK_I2S_APB1
#define RCC_PERIPHCLK_I2S_APB2
#define RCC_PERIPHCLK_FMPI2C1
#define RCC_PERIPHCLK_SPI1
#define RCC_PERIPHCLK_SPI2
#define RCC_PERIPHCLK_SPI3
#define RCC_PERIPHCLK_SPI4
#define RCC_PERIPHCLK_SPI5
#define RCC_PERIPHCLK_SPI6
#define RCC_PERIPHCLK_HSPI
#define RCC_PERIPHCLK_TIM
#define RCC_PERIPHCLK_TIM1
#define RCC_PERIPHCLK_TIM15
#define RCC_PERIPHCLK_LPTIM1
#define RCC_PERIPHCLK_LPTIM2
#define RCC_PERIPHCLK_LPTIM3
#define RCC_PERIPHCLK_LPTIM4
#define RCC_PERIPHCLK_LPTIM5
#define RCC_PERIPHCLK_LPTIM6
#define RCC_PERIPHCLK_LPTIM34
#define RCC_PERIPHCLK_SAI1
#define RCC_PERIPHCLK_SAI2
#define RCC_PERIPHCLK_SAIA
#define RCC_PERIPHCLK_SAIB
#define RCC_PERIPHCLK_SAI_PLLI2S
#define RCC_PERIPHCLK_SAI_PLLSAI
#define RCC_PERIPHCLK_SPDIFRX
#define RCC_PERIPHCLK_MDF1
#define RCC_PERIPHCLK_ADF1
#define RCC_PERIPHCLK_DFSDM2
#define RCC_PERIPHCLK_DFSDM1_AUDIO
#define RCC_PERIPHCLK_DFSDM2_AUDIO
#define RCC_PERIPHCLK_USB
#define RCC_PERIPHCLK_USBPHY
#define RCC_PERIPHCLK_ADC
#define RCC_PERIPHCLK_ADC12
#define RCC_PERIPHCLK_ADC345
#define RCC_PERIPHCLK_ADCDAC
#define RCC_PERIPHCLK_DAC
#define RCC_PERIPHCLK_DAC1
#define RCC_PERIPHCLK_DAC_LP
#define RCC_PERIPHCLK_CEC
#define RCC_PERIPHCLK_SWPMI1
#define RCC_PERIPHCLK_DFSDM1
#define RCC_PERIPHCLK_DFSDM1AUDIO
#define RCC_PERIPHCLK_FDCAN
#define RCC_PERIPHCLK_FDCAN1
#define RCC_PERIPHCLK_RTC
#define RCC_PERIPHCLK_RNG
#define RCC_PERIPHCLK_SAES
#define RCC_PERIPHCLK_SDIO
#define RCC_PERIPHCLK_SDMMC
#define RCC_PERIPHCLK_SDMMC1
#define RCC_PERIPHCLK_SDMMC2
#define RCC_PERIPHCLK_LTDC
#define RCC_PERIPHCLK_DSI
#define RCC_PERIPHCLK_OSPI
#define RCC_PERIPHCLK_QSPI
#define RCC_PERIPHCLK_HSIKER
#define RCC_PERIPHCLK_CKPER
#define RCC_PERIPHCLK_CLK48
#define RCC_PERIPHCLK_ICLK
#define RCC_PERIPHCLK_PLLI2S

Removed

HAL RCC HASI kernel divider

HAL1

HAL2 



#define RCC_HSIKER_DIV1
#define RCC_HSIKER_DIV2
#define RCC_HSIKER_DIV3
#define RCC_HSIKER_DIV4
#define RCC_HSIKER_DIV5
#define RCC_HSIKER_DIV6
#define RCC_HSIKER_DIV7
#define RCC_HSIKER_DIV8

typedef enum
{
  HAL_RCC_HSIK_DIV1,
  HAL_RCC_HSIK_DIV2,
  HAL_RCC_HSIK_DIV3,
  HAL_RCC_HSIK_DIV4,
  HAL_RCC_HSIK_DIV5,
  HAL_RCC_HSIK_DIV6,
  HAL_RCC_HSIK_DIV7,
  HAL_RCC_HSIK_DIV8
} hal_rcc_hsik_div_t;

HAL RCC bus clock prescaler

HAL1

HAL2 



#define RCC_SYSCLK_DIV1
#define RCC_SYSCLK_DIV2
#define RCC_SYSCLK_DIV4
#define RCC_SYSCLK_DIV8
#define RCC_SYSCLK_DIV16
#define RCC_SYSCLK_DIV64
#define RCC_SYSCLK_DIV128
#define RCC_SYSCLK_DIV256
#define RCC_SYSCLK_DIV512

typedef enum
{
  HAL_RCC_HCLK_PRESCALER1
  HAL_RCC_HCLK_PRESCALER2
  HAL_RCC_HCLK_PRESCALER4
  HAL_RCC_HCLK_PRESCALER8
  HAL_RCC_HCLK_PRESCALER16
  HAL_RCC_HCLK_PRESCALER64
  HAL_RCC_HCLK_PRESCALER128
  HAL_RCC_HCLK_PRESCALER256
  HAL_RCC_HCLK_PRESCALER512
} hal_rcc_hclk_div_t;

Related concept:

HAL RCC PCLK divider configuration

HAL1

HAL2 



#define RCC_HCLK_DIV1
#define RCC_HCLK_DIV2
#define RCC_HCLK_DIV4
#define RCC_HCLK_DIV8
#define RCC_HCLK_DIV16

typedef enum
{
  HAL_RCC_PCLK_PRESCALER1,
  HAL_RCC_PCLK_PRESCALER2,
  HAL_RCC_PCLK_PRESCALER4,
  HAL_RCC_PCLK_PRESCALER8,
  HAL_RCC_PCLK_PRESCALER16
} hal_rcc_pclk_div_t;

Related concept:

HAL RCC system clock source

HAL1

HAL2 



#define RCC_SYSCLKSOURCE_MSI
#define RCC_SYSCLKSOURCE_HSI
#define RCC_SYSCLKSOURCE_HSE
#define RCC_SYSCLKSOURCE_PLLCLK

typedef enum
{
  HAL_RCC_SYSCLK_SRC_MSIS
  HAL_RCC_SYSCLK_SRC_HSI
  HAL_RCC_SYSCLK_SRC_HSE
  HAL_RCC_SYSCLK_SRC_PLLCLK
} hal_rcc_sysclk_src_t;

Related concept:

HAL RCC APB1 clock divider

HAL1

HAL2 



#define RCC_APB1_DIV1
#define RCC_APB1_DIV2
#define RCC_APB1_DIV4
#define RCC_APB1_DIV8
#define RCC_APB1_DIV16

typedef enum
{
  HAL_RCC_PCLK_PRESCALER1
  HAL_RCC_PCLK_PRESCALER2
  HAL_RCC_PCLK_PRESCALER4
  HAL_RCC_PCLK_PRESCALER8
  HAL_RCC_PCLK_PRESCALER16
} hal_rcc_pclk_prescaler_t;

Related concept:

HAL RCC ADC clock source

HAL1

HAL2 



#define RCC_ADCCLKSOURCE_SYSCLK
#define RCC_ADCCLKSOURCE_HSIKER

typedef enum
{
  HAL_RCC_ADC_CLK_SRC_SYSCLK,
  HAL_RCC_ADC_CLK_SRC_HSIK
} hal_rcc_adc_clk_src_t;

Related concept:

HAL RCC peripheral clock source (USART1)

HAL1

HAL2 



#define RCC_USART1CLKSOURCE_PCLK2
#define RCC_USART1CLKSOURCE_SYSCLK
#define RCC_USART1CLKSOURCE_HSI
#define RCC_USART1CLKSOURCE_LSE

typedef enum
{
  HAL_RCC_USART1_CLK_SRC_PCLK2
  HAL_RCC_USART1_CLK_SRC_SYSCLK
  HAL_RCC_USART1_CLK_SRC_HSI
  HAL_RCC_USART1_CLK_SRC_LSE
} hal_rcc_usart1_clk_src_t;

In other STM32 series:

HAL1

HAL2 



#define RCC_USART1CLKSOURCE_PCLK1
#define RCC_USART1CLKSOURCE_SYSCLK
#define RCC_USART1CLKSOURCE_HSIKER
#define RCC_USART1CLKSOURCE_LSE

typedef enum
{
  HAL_RCC_USART1_CLK_SRC_PCLK1
  HAL_RCC_USART1_CLK_SRC_SYSCLK
  HAL_RCC_USART1_CLK_SRC_HSIK
  HAL_RCC_USART1_CLK_SRC_LSE
} hal_rcc_usart1_clk_src_t;

Related concept:

HAL RCC MCO clock source

HAL1

HAL2 



#define RCC_MCO1SOURCE_NOCLOCK
#define RCC_MCO1SOURCE_MSIK
#define RCC_MCO1SOURCE_HSI48
#define RCC_MCO1SOURCE_LSE
#define RCC_MCO1SOURCE_LSI
#define RCC_MCO1SOURCE_PLL1CLK
#define RCC_MCO1SOURCE_HSE
#define RCC_MCO1SOURCE_HSI
#define RCC_MCO1SOURCE_MSI
#define RCC_MCO1SOURCE_SYSCLK

typedef enum
{
  HAL_RCC_MCO1_SRC_NO_CLK
  HAL_RCC_MCO_SRC_SYSCLK
  HAL_RCC_MCO_SRC_MSI
  HAL_RCC_MCO_SRC_HSI
  HAL_RCC_MCO_SRC_HSE
  HAL_RCC_MCO_SRC_PLL1CLK
  HAL_RCC_MCO_SRC_LSI
  HAL_RCC_MCO_SRC_LSE
  HAL_RCC_MCO_SRC_HSI48
  HAL_RCC_MCO_SRC_MSIK
} hal_rcc_mco_src_t;

Related concept:

HAL RCC MCO clock divider

HAL1

HAL2 



#define RCC_MCODIV_1
#define RCC_MCODIV_2
#define RCC_MCODIV_4
#define RCC_MCODIV_8
#define RCC_MCODIV_16

typedef enum
{
  HAL_RCC_MCO_PRESCALER1
  HAL_RCC_MCO_PRESCALER2
  HAL_RCC_MCO_PRESCALER4
  HAL_RCC_MCO_PRESCALER8
  HAL_RCC_MCO_PRESCALER16
} hal_rcc_mco_prescaler_t;

Related concept:

HAL RCC PLL MBOOST configuration

HAL1

HAL2 



#define RCC_PLLMBOOST_DIV1
#define RCC_PLLMBOOST_DIV2
#define RCC_PLLMBOOST_DIV4
#define RCC_PLLMBOOST_DIV6
#define RCC_PLLMBOOST_DIV8
#define RCC_PLLMBOOST_DIV10
#define RCC_PLLMBOOST_DIV12
#define RCC_PLLMBOOST_DIV14
#define RCC_PLLMBOOST_DIV16

typedef enum
{
  HAL_RCC_PLLMBOOST_DIV1,
  HAL_RCC_PLLMBOOST_DIV2,
  HAL_RCC_PLLMBOOST_DIV4,
  HAL_RCC_PLLMBOOST_DIV6,
  HAL_RCC_PLLMBOOST_DIV8,
  HAL_RCC_PLLMBOOST_DIV10,
  HAL_RCC_PLLMBOOST_DIV12,
  HAL_RCC_PLLMBOOST_DIV14,
  HAL_RCC_PLLMBOOST_DIV16
} hal_rcc_pll_mboost_div_t;

Related concept:

HAL RCC PLL VCI range configuration

HAL1

HAL2 



#define RCC_PLLVCIRANGE_0
#define RCC_PLLVCIRANGE_1

typedef enum
{
  HAL_RCC_PLLVCI_RANGE_0,
  HAL_RCC_PLLVCI_RANGE_1
} hal_rcc_pll_vci_range_t;

Related concept:

HAL RCC PLL source configuration

HAL1

HAL2 

#define RCC_PLLSOURCE_NONE





#define RCC_PLLSOURCE_MSI
#define RCC_PLLSOURCE_HSI
#define RCC_PLLSOURCE_HSE

Unitary API are provided in HAL2 to cover this feature. 




typedef enum
{
  HAL_RCC_PLL_SRC_MSIS,
  HAL_RCC_PLL_SRC_HSI,
  HAL_RCC_PLL_SRC_HSE
} hal_rcc_pll_src_t;

Related concept:

HAL RCC MSIS range configuration

HAL1

HAL2 



#define RCC_MSIRANGE_0
#define RCC_MSIRANGE_1
#define RCC_MSIRANGE_2
#define RCC_MSIRANGE_3
#define RCC_MSIRANGE_4
#define RCC_MSIRANGE_5
#define RCC_MSIRANGE_6
#define RCC_MSIRANGE_7
#define RCC_MSIRANGE_8
#define RCC_MSIRANGE_9
#define RCC_MSIRANGE_10
#define RCC_MSIRANGE_11
#define RCC_MSIRANGE_12
#define RCC_MSIRANGE_13
#define RCC_MSIRANGE_14
#define RCC_MSIRANGE_15

typedef enum
{
  HAL_RCC_MSIS_FREQ_48MHZ,
  HAL_RCC_MSIS_FREQ_24MHZ,
  HAL_RCC_MSIS_FREQ_16MHZ,
  HAL_RCC_MSIS_FREQ_12MHZ,
  HAL_RCC_MSIS_FREQ_4MHZ,
  HAL_RCC_MSIS_FREQ_2MHZ,
  HAL_RCC_MSIS_FREQ_1330KHZ,
  HAL_RCC_MSIS_FREQ_1MHZ,
  HAL_RCC_MSIS_FREQ_3072KHZ,
  HAL_RCC_MSIS_FREQ_1536KHZ,
  HAL_RCC_MSIS_FREQ_1024KHZ,
  HAL_RCC_MSIS_FREQ_768KHZ,
  HAL_RCC_MSIS_FREQ_400KHZ,
  HAL_RCC_MSIS_FREQ_200KHZ,
  HAL_RCC_MSIS_FREQ_133KHZ,
  HAL_RCC_MSIS_FREQ_100KHZ
} hal_rcc_msis_range_t;

Related concept:

HAL RCC MSIK range configuration

HAL1

HAL2 



#define RCC_MSIKRANGE_0
#define RCC_MSIKRANGE_1
#define RCC_MSIKRANGE_2
#define RCC_MSIKRANGE_3
#define RCC_MSIKRANGE_4
#define RCC_MSIKRANGE_5
#define RCC_MSIKRANGE_6
#define RCC_MSIKRANGE_7
#define RCC_MSIKRANGE_8
#define RCC_MSIKRANGE_9
#define RCC_MSIKRANGE_10
#define RCC_MSIKRANGE_11
#define RCC_MSIKRANGE_12
#define RCC_MSIKRANGE_13
#define RCC_MSIKRANGE_14
#define RCC_MSIKRANGE_15

typedef enum
{
  HAL_RCC_MSIK_FREQ_48MHZ,
  HAL_RCC_MSIK_FREQ_24MHZ,
  HAL_RCC_MSIK_FREQ_16MHZ,
  HAL_RCC_MSIK_FREQ_12MHZ,
  HAL_RCC_MSIK_FREQ_4MHZ,
  HAL_RCC_MSIK_FREQ_2MHZ,
  HAL_RCC_MSIK_FREQ_1330KHZ,
  HAL_RCC_MSIK_FREQ_1MHZ,
  HAL_RCC_MSIK_FREQ_3072KHZ,
  HAL_RCC_MSIK_FREQ_1536KHZ,
  HAL_RCC_MSIK_FREQ_1024KHZ,
  HAL_RCC_MSIK_FREQ_768KHZ,
  HAL_RCC_MSIK_FREQ_400KHZ,
  HAL_RCC_MSIK_FREQ_200KHZ,
  HAL_RCC_MSIK_FREQ_133KHZ,
  HAL_RCC_MSIK_FREQ_100KHZ
} hal_rcc_msik_range_t;

Related concept:

HAL RCC RTC clock source configuration

HAL1

HAL2 



#define RCC_RTCCLKSOURCE_NO_CLK
#define RCC_RTCCLKSOURCE_LSE
#define RCC_RTCCLKSOURCE_LSI
#define RCC_RTCCLKSOURCE_HSE_DIVx
#define RCC_RTCCLKSOURCE_HSE_DIV2
#define RCC_RTCCLKSOURCE_HSE_DIV3
.
.
.
#define RCC_RTCCLKSOURCE_HSE_DIV63

typedef enum
{
  HAL_RCC_RTC_CLK_SRC_NONE,
  HAL_RCC_RTC_CLK_SRC_LSE,
  HAL_RCC_RTC_CLK_SRC_LSI,

  HAL_RCC_RTC_CLK_SRC_HSE_DIV2
  HAL_RCC_RTC_CLK_SRC_HSE_DIV3
  .
  .
  .
  HAL_RCC_RTC_CLK_SRC_HSE_DIV63
} hal_rcc_rtc_clk_src_t;

Note

The HAL2 enumeration may differ from one series to another.

Related concept:

HAL RCC FDCAN clock source configuration

HAL1

HAL2 



#define RCC_FDCAN1CLKSOURCE_HSE
#define RCC_FDCAN1CLKSOURCE_PLL1
#define RCC_FDCAN1CLKSOURCE_PLL2

typedef enum
{
  HAL_RCC_FDCAN_CLK_SRC_HSE,
  HAL_RCC_FDCAN_CLK_SRC_PLL1Q,
  HAL_RCC_FDCAN_CLK_SRC_PLL2P
} hal_rcc_fdcan_clk_src_t;

Related concept:

HAL RCC LSE drive configuration

HAL1

HAL2 



#define RCC_LSEDRIVE_LOW
#define RCC_LSEDRIVE_MEDIUMLOW
#define RCC_LSEDRIVE_MEDIUMHIGH
#define RCC_LSEDRIVE_HIGH

typedef enum
{
  HAL_RCC_LSE_DRIVE_LOW,
  HAL_RCC_LSE_DRIVE_MEDIUMLOW,
  HAL_RCC_LSE_DRIVE_MEDIUMHIGH,
  HAL_RCC_LSE_DRIVE_HIGH
} hal_rcc_lse_drive_t;

Related concept:

HAL RCC stop wakeup clock configuration

HAL1

HAL2 



#define RCC_STOP_WAKEUPCLOCK_MSI
#define RCC_STOP_WAKEUPCLOCK_HSI

typedef enum
{
  HAL_RCC_STOP_WAKEUPCLOCK_MSI,
  HAL_RCC_STOP_WAKEUPCLOCK_HSI
} hal_rcc_stop_wakeup_clk_t;

Related concept:

HAL RCC LSCO source configuration

HAL1

HAL2 



#define RCC_LSCOSOURCE_LSI
#define RCC_LSCOSOURCE_LSE

typedef enum
{
  HAL_RCC_LSCO_SRC_LSI,
  HAL_RCC_LSCO_SRC_LSE
} hal_rcc_lsco_src_t;

Related concept:

HAL RCC MSI PLL mode selection configuration

HAL1

HAL2 



#define RCC_MSIKPLL_MODE_SEL
#define RCC_MSISPLL_MODE_SEL

typedef enum
{
  HAL_RCC_MSI_PLL_MODE_SEL_MSIK,
  HAL_RCC_MSI_PLL_MODE_SEL_MSIS
} hal_rcc_msi_pll_mode_sel_t;

Related concept:

HAL RCC USART2 clock source configuration

HAL1

HAL2 



#define RCC_USART2CLKSOURCE_PCLK1
#define RCC_USART2CLKSOURCE_SYSCLK
#define RCC_USART2CLKSOURCE_HSI
#define RCC_USART2CLKSOURCE_LSE

typedef enum
{
  HAL_RCC_USART2_CLK_SRC_PCLK1,
  HAL_RCC_USART2_CLK_SRC_SYSCLK,
  HAL_RCC_USART2_CLK_SRC_HSI,
  HAL_RCC_USART2_CLK_SRC_LSE
} hal_rcc_usart2_clk_src_t;

Related concept:

HAL RCC USART3 clock source configuration

HAL1

HAL2 



#define RCC_USART3CLKSOURCE_PCLK1
#define RCC_USART3CLKSOURCE_SYSCLK
#define RCC_USART3CLKSOURCE_HSI
#define RCC_USART3CLKSOURCE_LSE

typedef enum
{
  HAL_RCC_USART3_CLK_SRC_PCLK1,
  HAL_RCC_USART3_CLK_SRC_SYSCLK,
  HAL_RCC_USART3_CLK_SRC_HSI,
  HAL_RCC_USART3_CLK_SRC_LSE
} hal_rcc_usart3_clk_src_t;

Related concept:

HAL RCC UART4 clock source configuration

HAL1

HAL2 



#define RCC_UART4CLKSOURCE_PCLK1
#define RCC_UART4CLKSOURCE_SYSCLK
#define RCC_UART4CLKSOURCE_HSI
#define RCC_UART4CLKSOURCE_LSE

typedef enum
{
  HAL_RCC_UART4_CLK_SRC_PCLK1,
  HAL_RCC_UART4_CLK_SRC_SYSCLK,
  HAL_RCC_UART4_CLK_SRC_HSI,
  HAL_RCC_UART4_CLK_SRC_LSE
} hal_rcc_uart4_clk_src_t;

Related concept:

HAL RCC UART5 clock source configuration

HAL1

HAL2 



#define RCC_UART5CLKSOURCE_PCLK1
#define RCC_UART5CLKSOURCE_SYSCLK
#define RCC_UART5CLKSOURCE_HSI
#define RCC_UART5CLKSOURCE_LSE

typedef enum
{
  HAL_RCC_UART5_CLK_SRC_PCLK1,
  HAL_RCC_UART5_CLK_SRC_SYSCLK,
  HAL_RCC_UART5_CLK_SRC_HSI,
  HAL_RCC_UART5_CLK_SRC_LSE
} hal_rcc_uart5_clk_src_t;

Related concept:

HAL RCC USART6 clock source configuration

HAL1

HAL2 



#define RCC_USART6CLKSOURCE_PCLK1
#define RCC_USART6CLKSOURCE_SYSCLK
#define RCC_USART6CLKSOURCE_HSI
#define RCC_USART6CLKSOURCE_LSE

typedef enum
{
  HAL_RCC_USART6_CLK_SRC_PCLK,
  HAL_RCC_USART6_CLK_SRC_SYSCLK,
  HAL_RCC_USART6_CLK_SRC_HSI,
  HAL_RCC_USART6_CLK_SRC_LSE
} hal_rcc_usart6_clk_src_t;

Related concept:

HAL RCC LPUART1 clock source configuration

HAL1

HAL2 



#define RCC_LPUART1CLKSOURCE_PCLK1
#define RCC_LPUART1CLKSOURCE_PCLK3
#define RCC_LPUART1CLKSOURCE_SYSCLK
#define RCC_LPUART1CLKSOURCE_HSI
#define RCC_LPUART1CLKSOURCE_LSE
#define RCC_LPUART1CLKSOURCE_MSIK

typedef enum
{
  HAL_RCC_LPUART1_CLK_SRC_PCLK,

  HAL_RCC_LPUART1_CLK_SRC_SYSCLK,
  HAL_RCC_LPUART1_CLK_SRC_HSI,
  HAL_RCC_LPUART1_CLK_SRC_LSE,
  HAL_RCC_LPUART1_CLK_SRC_MSI
} hal_rcc_lpuart1_clk_src_t;

Note

The HAL2 enumeration may differ from one series to another.

Related concept:

HAL RCC I2S1 clock source configuration

HAL1

HAL2 



#define RCC_I2S1CLKSOURCE_SYSCLK
#define RCC_I2S1CLKSOURCE_HSIKER
#define RCC_I2S1CLKSOURCE_EXT

typedef enum
{
  HAL_RCC_I2S1_CLK_SRC_SYSCLK,
  HAL_RCC_I2S1_CLK_SRC_HSIK,
  HAL_RCC_I2S1_CLK_SRC_PIN
} hal_rcc_i2s1_clk_src_t;

Related concept:

HAL RCC I2C1 clock source configuration

HAL1

HAL2 



#define RCC_I2C1CLKSOURCE_PCLK1
#define RCC_I2C1CLKSOURCE_SYSCLK
#define RCC_I2C1CLKSOURCE_HSI
#define RCC_I2C1CLKSOURCE_MSIK
#define RCC_I2C1CLKSOURCE_HSIKER

typedef enum
{
  HAL_RCC_I2C1_CLK_SRC_PCLK1,
  HAL_RCC_I2C1_CLK_SRC_SYSCLK,
  HAL_RCC_I2C1_CLK_SRC_HSI,
  HAL_RCC_I2C1_CLK_SRC_MSIK
  HAL_RCC_I2C1_CLK_SRC_HSIK
} hal_rcc_i2c1_clk_src_t;

Note

The HAL2 enumeration may differ from one series to another.

Related concept:

HAL RCC I2C2 clock source configuration

HAL1

HAL2 



#define RCC_I2C2CLKSOURCE_PCLK1
#define RCC_I2C2CLKSOURCE_SYSCLK
#define RCC_I2C2CLKSOURCE_HSI
#define RCC_I2C2CLKSOURCE_MSIK

typedef enum
{
  HAL_RCC_I2C2_CLK_SRC_PCLK1,
  HAL_RCC_I2C2_CLK_SRC_SYSCLK,
  HAL_RCC_I2C2_CLK_SRC_HSI,
  HAL_RCC_I2C2_CLK_SRC_MSIK
} hal_rcc_i2c2_clk_src_t;

Related concept:

HAL RCC I2C3 clock source configuration

HAL1

HAL2 



#define RCC_I2C3CLKSOURCE_PCLK1
#define RCC_I2C3CLKSOURCE_PCLK3
#define RCC_I2C3CLKSOURCE_SYSCLK
#define RCC_I2C3CLKSOURCE_HSI
#define RCC_I2C3CLKSOURCE_MSIK

typedef enum
{
  HAL_RCC_I2C3_CLK_SRC_PCLK3,
  HAL_RCC_I2C3_CLK_SRC_SYSCLK,
  HAL_RCC_I2C3_CLK_SRC_HSI,
  HAL_RCC_I2C3_CLK_SRC_MSIK
} hal_rcc_i2c3_clk_src_t;

Note

The HAL2 enumeration may differ from one series to another.

Related concept:

HAL RCC I2C4 clock source configuration

HAL1

HAL2 



#define RCC_I2C4CLKSOURCE_PCLK1
#define RCC_I2C4CLKSOURCE_SYSCLK
#define RCC_I2C4CLKSOURCE_HSI
#define RCC_I2C4CLKSOURCE_MSIK

typedef enum
{
  HAL_RCC_I2C4_CLK_SRC_PCLK1,
  HAL_RCC_I2C4_CLK_SRC_SYSCLK,
  HAL_RCC_I2C4_CLK_SRC_HSI,
  HAL_RCC_I2C4_CLK_SRC_MSIK
} hal_rcc_i2c4_clk_src_t;

Related concept:

HAL RCC I2C5 clock source configuration

HAL1

HAL2 



#define RCC_I2C5CLKSOURCE_PCLK1
#define RCC_I2C5CLKSOURCE_SYSCLK
#define RCC_I2C5CLKSOURCE_HSI
#define RCC_I2C5CLKSOURCE_MSIK

typedef enum
{
  HAL_RCC_I2C5_CLK_SRC_PCLK1,
  HAL_RCC_I2C5_CLK_SRC_SYSCLK,
  HAL_RCC_I2C5_CLK_SRC_HSI,
  HAL_RCC_I2C5_CLK_SRC_MSIK
} hal_rcc_i2c5_clk_src_t;

Related concept:

HAL RCC I2C6 clock source configuration

HAL1

HAL2 



#define RCC_I2C6CLKSOURCE_PCLK1
#define RCC_I2C6CLKSOURCE_SYSCLK
#define RCC_I2C6CLKSOURCE_HSI
#define RCC_I2C6CLKSOURCE_MSIK

typedef enum
{
  HAL_RCC_I2C6_CLK_SRC_PCLK1,
  HAL_RCC_I2C6_CLK_SRC_SYSCLK,
  HAL_RCC_I2C6_CLK_SRC_HSI,
  HAL_RCC_I2C6_CLK_SRC_MSIK
} hal_rcc_i2c6_clk_src_t;

Related concept:

HAL RCC RNG clock source configuration

HAL1

HAL2 



#define RCC_RNGCLKSOURCE_HSI48
#define RCC_RNGCLKSOURCE_HSI48_D
#define RCC_RNGCLKSOURCE_HSI

typedef enum
{
  HAL_RCC_RNG_CLK_SRC_HSI48,
  HAL_RCC_RNG_CLK_SRC_HSI48_D,
  HAL_RCC_RNG_CLK_SRC_HSI
} hal_rcc_rng_clk_src_t;

Related concept:

HAL RCC SAES clock source configuration

HAL1

HAL2 



#define RCC_SAESCLKSOURCE_SHSI
#define RCC_SAESCLKSOURCE_SHSI_D

typedef enum
{
  HAL_RCC_SAES_CLK_SRC_SHSI,
  HAL_RCC_SAES_CLK_SRC_SHSI_D
} hal_rcc_saes_clk_src_t;

Related concept:

HAL RCC SPI1 clock source configuration

HAL1

HAL2 



#define RCC_SPI1CLKSOURCE_PCLK2
#define RCC_SPI1CLKSOURCE_SYSCLK
#define RCC_SPI1CLKSOURCE_HSI
#define RCC_SPI1CLKSOURCE_MSIK

typedef enum
{
  HAL_RCC_SPI1_CLK_SRC_PCLK2,
  HAL_RCC_SPI1_CLK_SRC_SYSCLK,
  HAL_RCC_SPI1_CLK_SRC_HSI,
  HAL_RCC_SPI1_CLK_SRC_MSIK
} hal_rcc_spi1_clk_src_t;

Related concept:

HAL RCC SPI2 clock source configuration

HAL1

HAL2 



#define RCC_SPI2CLKSOURCE_PCLK1
#define RCC_SPI2CLKSOURCE_SYSCLK
#define RCC_SPI2CLKSOURCE_HSI
#define RCC_SPI2CLKSOURCE_MSIK

typedef enum
{
  HAL_RCC_SPI2_CLK_SRC_PCLK1,
  HAL_RCC_SPI2_CLK_SRC_SYSCLK,
  HAL_RCC_SPI2_CLK_SRC_HSI,
  HAL_RCC_SPI2_CLK_SRC_MSIK
} hal_rcc_spi2_clk_src_t;

Related concept:

HAL RCC SPI3 clock source configuration

HAL1

HAL2 



#define RCC_SPI3CLKSOURCE_PCLK3
#define RCC_SPI3CLKSOURCE_SYSCLK
#define RCC_SPI3CLKSOURCE_HSI
#define RCC_SPI3CLKSOURCE_MSIK

typedef enum
{
  HAL_RCC_SPI3_CLK_SRC_PCLK3,
  HAL_RCC_SPI3_CLK_SRC_SYSCLK,
  HAL_RCC_SPI3_CLK_SRC_HSI,
  HAL_RCC_SPI3_CLK_SRC_MSIK
} hal_rcc_spi3_clk_src_t;

Related concept:

HAL RCC LPTIM34 clock source configuration

HAL1

HAL2 



#define RCC_LPTIM34CLKSOURCE_MSI
#define RCC_LPTIM34CLKSOURCE_LSI
#define RCC_LPTIM34CLKSOURCE_HSI
#define RCC_LPTIM34CLKSOURCE_LSE

typedef enum
{
  HAL_RCC_LPTIM34_CLK_SRC_MSI,
  HAL_RCC_LPTIM34_CLK_SRC_LSI,
  HAL_RCC_LPTIM34_CLK_SRC_HSI,
  HAL_RCC_LPTIM34_CLK_SRC_LSE
} hal_rcc_lptim34_clk_src_t;

Related concept:

HAL RCC LPTIM1 clock source configuration

HAL1

HAL2 



#define RCC_LPTIM1CLKSOURCE_MSIK
#define RCC_LPTIM1CLKSOURCE_LSI
#define RCC_LPTIM1CLKSOURCE_HSI
#define RCC_LPTIM1CLKSOURCE_LSE

typedef enum
{
  HAL_RCC_LPTIM1_CLK_SRC_MSIK,
  HAL_RCC_LPTIM1_CLK_SRC_LSI,
  HAL_RCC_LPTIM1_CLK_SRC_HSI,
  HAL_RCC_LPTIM1_CLK_SRC_LSE
} hal_rcc_lptim1_clk_src_t;

Related concept:

HAL RCC LPTIM2 clock source configuration

HAL1

HAL2 



#define RCC_LPTIM2CLKSOURCE_PCLK
#define RCC_LPTIM2CLKSOURCE_LSI
#define RCC_LPTIM2CLKSOURCE_HSI
#define RCC_LPTIM2CLKSOURCE_LSE

typedef enum
{
  HAL_RCC_LPTIM2_CLK_SRC_PCLK,
  HAL_RCC_LPTIM2_CLK_SRC_LSI,
  HAL_RCC_LPTIM2_CLK_SRC_HSI,
  HAL_RCC_LPTIM2_CLK_SRC_LSE
} hal_rcc_lptim2_clk_src_t;

Related concept:

HAL RCC ICLK clock source configuration

HAL1

HAL2 



#define RCC_ICLK_CLKSOURCE_HSI48
#define RCC_ICLK_CLKSOURCE_PLL2
#define RCC_ICLK_CLKSOURCE_PLL1
#define RCC_ICLK_CLKSOURCE_MSIK

typedef enum
{
  HAL_RCC_ICLK_CLK_SRC_HSI48,
  HAL_RCC_ICLK_CLK_SRC_PLL2,
  HAL_RCC_ICLK_CLK_SRC_PLL1,
  HAL_RCC_ICLK_CLK_SRC_MSIK
} hal_rcc_iclk_clk_src_t;

Related concept:

HAL RCC ADCDAC clock source configuration

HAL1

HAL2 



#define RCC_ADCDACCLKSOURCE_HCLK
#define RCC_ADCDACCLKSOURCE_SYSCLK
#define RCC_ADCDACCLKSOURCE_PLL2
#define RCC_ADCDACCLKSOURCE_HSE
#define RCC_ADCDACCLKSOURCE_HSI
#define RCC_ADCDACCLKSOURCE_MSIK

typedef enum
{
  HAL_RCC_ADCDAC_CLK_SRC_HCLK,
  HAL_RCC_ADCDAC_CLK_SRC_SYSCLK,
  HAL_RCC_ADCDAC_CLK_SRC_PLL2,
  HAL_RCC_ADCDAC_CLK_SRC_HSE,
  HAL_RCC_ADCDAC_CLK_SRC_HSI,
  HAL_RCC_ADCDAC_CLK_SRC_MSIK
} hal_rcc_adcdac_clk_src_t;

Note

The HAL2 enumeration may differ from one series to another.

Related concept:

HAL RCC MDF1 clock source configuration

HAL1

HAL2 



#define RCC_MDF1CLKSOURCE_HCLK
#define RCC_MDF1CLKSOURCE_PLL1
#define RCC_MDF1CLKSOURCE_PLL3
#define RCC_MDF1CLKSOURCE_PIN
#define RCC_MDF1CLKSOURCE_MSIK

typedef enum
{
  HAL_RCC_MDF1_CLK_SRC_HCLK,
  HAL_RCC_MDF1_CLK_SRC_PLL1,
  HAL_RCC_MDF1_CLK_SRC_PLL3,
  HAL_RCC_MDF1_CLK_SRC_AUDIOCLK,
  HAL_RCC_MDF1_CLK_SRC_MSIK
} hal_rcc_mdf1_clk_src_t;

Related concept:

HAL RCC ADF1 clock source configuration

HAL1

HAL2 



#define RCC_ADF1CLKSOURCE_HCLK
#define RCC_ADF1CLKSOURCE_PLL1
#define RCC_ADF1CLKSOURCE_PLL3
#define RCC_ADF1CLKSOURCE_PIN
#define RCC_ADF1CLKSOURCE_MSIK

typedef enum
{
  HAL_RCC_ADF1_CLK_SRC_HCLK,
  HAL_RCC_ADF1_CLK_SRC_PLL1,
  HAL_RCC_ADF1_CLK_SRC_PLL3,
  HAL_RCC_ADF1_CLK_SRC_AUDIOCLK,
  HAL_RCC_ADF1_CLK_SRC_MSIK
} hal_rcc_adf1_clk_src_t;

Related concept:

HAL RCC SAI1 clock source configuration

HAL1

HAL2 



#define RCC_SAI1CLKSOURCE_PLL2
#define RCC_SAI1CLKSOURCE_PLL3
#define RCC_SAI1CLKSOURCE_PLL1
#define RCC_SAI1CLKSOURCE_PIN
#define RCC_SAI1CLKSOURCE_HSI

typedef enum
{
  HAL_RCC_SAI1_CLK_SRC_PLL2,
  HAL_RCC_SAI1_CLK_SRC_PLL3,
  HAL_RCC_SAI1_CLK_SRC_PLL1,
  HAL_RCC_SAI1_CLK_SRC_AUDIOCLK,
  HAL_RCC_SAI1_CLK_SRC_HSI
} hal_rcc_sai1_clk_src_t;

Related concept:

HAL RCC SAI2 clock source configuration

HAL1

HAL2 



#define RCC_SAI2CLKSOURCE_PLL2
#define RCC_SAI2CLKSOURCE_PLL3
#define RCC_SAI2CLKSOURCE_PLL1
#define RCC_SAI2CLKSOURCE_PIN
#define RCC_SAI2CLKSOURCE_HSI

typedef enum
{
  HAL_RCC_SAI2_CLK_SRC_PLL2,
  HAL_RCC_SAI2_CLK_SRC_PLL3,
  HAL_RCC_SAI2_CLK_SRC_PLL1,
  HAL_RCC_SAI2_CLK_SRC_AUDIOCLK,
  HAL_RCC_SAI2_CLK_SRC_HSI
} hal_rcc_sai2_clk_src_t;

Related concept:

HAL RCC SDMMC clock source configuration

HAL1

HAL2 



#define RCC_SDMMCCLKSOURCE_CLK48
#define RCC_SDMMCCLKSOURCE_PLL1

typedef enum
{
  HAL_RCC_SDMMC_CLK_SRC_CLK48,
  HAL_RCC_SDMMC_CLK_SRC_PLL1
} hal_rcc_sdmmc_clk_src_t;

Related concept:

HAL RCC OSPI clock source configuration

HAL1

HAL2 



#define RCC_OSPICLKSOURCE_SYSCLK
#define RCC_OSPICLKSOURCE_MSIK
#define RCC_OSPICLKSOURCE_PLL1
#define RCC_OSPICLKSOURCE_PLL2

typedef enum
{
  HAL_RCC_OCTOSPI_CLK_SRC_SYSCLK,
  HAL_RCC_OCTOSPI_CLK_SRC_MSIK,
  HAL_RCC_OCTOSPI_CLK_SRC_PLL1,
  HAL_RCC_OCTOSPI_CLK_SRC_PLL2
} hal_rcc_octospi_clk_src_t;

Related concept:

HAL RCC HSPI clock source configuration

HAL1

HAL2 



#define RCC_HSPICLKSOURCE_SYSCLK
#define RCC_HSPICLKSOURCE_PLL1
#define RCC_HSPICLKSOURCE_PLL2
#define RCC_HSPICLKSOURCE_PLL3

typedef enum
{
  HAL_RCC_HSPI1_CLK_SRC_SYSCLK,
  HAL_RCC_HSPI1_CLK_SRC_PLL1,
  HAL_RCC_HSPI1_CLK_SRC_PLL2,
  HAL_RCC_HSPI1_CLK_SRC_PLL3
} hal_rcc_hspi1_clk_src_t;

Related concept:

HAL RCC DAC1 clock source configuration

HAL1

HAL2 



#define RCC_DAC1CLKSOURCE_LSE
#define RCC_DAC1CLKSOURCE_LSI

typedef enum
{
  HAL_RCC_DAC1_CLK_SRC_LSE,
  HAL_RCC_DAC1_CLK_SRC_LSI
} hal_rcc_dac1_clk_src_t;

Related concept:

HAL RCC timeout value

HAL1

HAL2 

#define MSI_TIMEOUT_VALUE
#define HSI_TIMEOUT_VALUE
#define HSE_TIMEOUT_VALUE

#define MSI_TIMEOUT_VALUE
#define HSI_TIMEOUT_VALUE
#define HSE_TIMEOUT_VALUE

HAL RCC TIMIC clock source configuration

HAL1

HAL2 



#define RCC_TIMIC_HSI_256
#define RCC_TIMIC_MSI_1024
#define RCC_TIMIC_MSI_4
#define RCC_TIMIC_MSIK_4
#define RCC_TIMIC_MSIK_1024

typedef enum
{
  HAL_RCC_TIMIC_CLK_SRC_HSI_256,
  HAL_RCC_TIMIC_CLK_SRC_MSI_1024,
  HAL_RCC_TIMIC_CLK_SRC_MSI_4,
  HAL_RCC_TIMIC_CLK_SRC_MSIK_4,
  HAL_RCC_TIMIC_CLK_SRC_MSIK_1024
} hal_rcc_timic_clk_src_t;

Related concept:

HAL RCC LTDC clock source configuration

HAL1

HAL2 



#define RCC_LTDCCLKSOURCE_PLL3
#define RCC_LTDCCLKSOURCE_PLL2

typedef enum
{
  HAL_RCC_LTDC_CLK_SRC_PLL3,
  HAL_RCC_LTDC_CLK_SRC_PLL2
} hal_rcc_ltdc_clk_src_t;

Related concept:

HAL RCC DSI clock source configuration

HAL1

HAL2 



#define RCC_DSICLKSOURCE_DSIPHY
#define RCC_DSICLKSOURCE_PLL3

typedef enum
{
  HAL_RCC_DSI_CLK_SRC_DSIPHY,
  HAL_RCC_DSI_CLK_SRC_PLL3
} hal_rcc_dsi_clk_src_t;

Related concept:

HAL RCC stop kernel wakeup clock configuration

HAL1

HAL2 



#define RCC_STOP_KERWAKEUPCLOCK_MSI
#define RCC_STOP_KERWAKEUPCLOCK_HSI

typedef enum
{
  HAL_RCC_STOP_KERWAKEUPCLOCK_MSI,
  HAL_RCC_STOP_KERWAKEUPCLOCK_HSI
} hal_rcc_stop_wakeup_clk_t;

Related concept:

HAL RCC USBPHY clock source configuration

HAL1

HAL2 



#define RCC_USBPHYCLKSOURCE_HSE
#define RCC_USBPHYCLKSOURCE_HSE_DIV2
#define RCC_USBPHYCLKSOURCE_PLL1
#define RCC_USBPHYCLKSOURCE_PLL1_DIV2

typedef enum
{
  HAL_RCC_USBHSPHY_CLK_SRC_HSE,
  HAL_RCC_USBHSPHY_CLK_SRC_HSE_DIV2,
  HAL_RCC_USBHSPHY_CLK_SRC_PLL1,
  HAL_RCC_USBHSPHY_CLK_SRC_PLL1_DIV2
} hal_rcc_usbhsphy_clk_src_t;

Related concept:

Note

HAL RCC flags have been removed. Configuration shall instead be performed using the corresponding LL constants

HAL RCC interrupt flags

HAL1

HAL2 

#define RCC_IT_LSIRDY

Removed; use LL constant LL_RCC_IT_LSIRDY. 

#define RCC_IT_LSERDY

Removed; use LL constant LL_RCC_IT_LSERDY. 

#define RCC_IT_MSIRDY

Removed; use LL constant LL_RCC_IT_MSIRDY. 

#define RCC_IT_HSIRDY

Removed; use LL constant LL_RCC_IT_HSIRDY. 

#define RCC_IT_HSERDY

Removed; use LL constant LL_RCC_IT_HSERDY. 

#define RCC_IT_HSI48RDY

Removed; use LL constant LL_RCC_IT_HSI48RDY. 

#define RCC_IT_PLLRDY

Removed; use LL constant LL_RCC_IT_PLLRDY. 

#define RCC_IT_PLL2RDY

Removed; use LL constant LL_RCC_IT_PLL2RDY. 

#define RCC_IT_PLL3RDY

Removed; use LL constant LL_RCC_IT_PLL3RDY. 

#define RCC_IT_CSS

Removed; use LL constant LL_RCC_IT_CSS. 

#define RCC_IT_MSIKRDY

Removed; use LL constant LL_RCC_IT_MSIKRDY. 

#define RCC_IT_SHSIRDY

Removed; use LL constant LL_RCC_IT_SHSIRDY.

HAL RCC flags

HAL1

HAL2 

#define RCC_FLAG_MSIRDY

Removed; use LL_RCC_MSI_IsReady() 

#define RCC_FLAG_MSIKRDY

Removed; use LL_RCC_MSIK_IsReady() 

#define RCC_FLAG_HSIRDY

Removed; use LL_RCC_HSI_IsReady() 

#define RCC_FLAG_HSERDY

Removed; use LL_RCC_HSE_IsReady() 

#define RCC_FLAG_PLL1RDY

Removed; use LL_RCC_PLL1_IsReady() 

#define RCC_FLAG_PLL2RDY

Removed; use LL_RCC_PLL2_IsReady() 

#define RCC_FLAG_PLL3RDY

Removed; use LL_RCC_PLL3_IsReady() 

#define RCC_FLAG_SHSIRDY

Removed; use LL_RCC_SHSI_IsReady() 

#define RCC_FLAG_HSI48RDY

Removed; use LL_RCC_HSI48_IsReady() 

#define RCC_FLAG_LSERDY

Removed; use LL_RCC_LSE_IsReady() 

#define RCC_FLAG_LSESYSRDY

Removed; use LL_RCC_LSESYS_IsReady() 

#define RCC_FLAG_LSECSSD

Removed; use LL_RCC_LSECSS_IsReady() 

#define RCC_FLAG_LSIRDY

Removed; use LL_RCC_LSI_IsReady() 

#define RCC_RESET_FLAG_ALL

#define HAL_RCC_RESET_FLAG_ALL

#define RCC_RESET_FLAG_LPWR

#define HAL_RCC_RESET_FLAG_LPWR

#define RCC_RESET_FLAG_WWDG

#define HAL_RCC_RESET_FLAG_WWDG

#define RCC_RESET_FLAG_IWDG

#define HAL_RCC_RESET_FLAG_IWDG

#define RCC_RESET_FLAG_SW

#define HAL_RCC_RESET_FLAG_SW

#define RCC_RESET_FLAG_PWR

#define HAL_RCC_RESET_FLAG_PWR

#define RCC_RESET_FLAG_PIN

#define HAL_RCC_RESET_FLAG_PIN

#define RCC_RESET_FLAG_OBL

#define HAL_RCC_RESET_FLAG_OBL

#define RCC_FLAG_OBLRST

#define HAL_RCC_RESET_FLAG_OBL

#define RCC_FLAG_PINRST

#define HAL_RCC_RESET_FLAG_PIN

#define RCC_FLAG_BORRST

#define HAL_RCC_RESET_FLAG_PWR

#define RCC_FLAG_SFTRST

#define HAL_RCC_RESET_FLAG_SW

#define RCC_FLAG_LPWRRST

#define HAL_RCC_RESET_FLAG_LPWR

#define RCC_FLAG_WWDGRST

#define HAL_RCC_RESET_FLAG_WWDG

#define RCC_FLAG_IWDGRST

#define HAL_RCC_RESET_FLAG_IWDG

#define RCC_FLAG_PWRRST

#define HAL_RCC_RESET_FLAG_LPWR

HAL RCC CRS errors

HAL1

HAL2

In HAL1, error handling is done using a set of macros that define various error states.

In HAL2, the error defines are renamed.

The RCC_CRS_TIMEOUT and RCC_CRS_SYNCOK are removed. These kinds of logical errors are reported by the direct function return. 

#define RCC_CRS_NONE
#define RCC_CRS_SYNCWARN
#define RCC_CRS_SYNCERR
#define RCC_CRS_SYNCMISS
#define RCC_CRS_TRIMOVF
#define RCC_CRS_TIMEOUT
#define RCC_CRS_SYNCOK

#define HAL_CRS_ERROR_NONE
#define HAL_CRS_ERROR_SYNC_WARN
#define HAL_CRS_ERROR_SYNC_ERROR
#define HAL_CRS_ERROR_SYNC_MISSED
#define HAL_CRS_ERROR_TRIMMING
/* Removed */
/* Removed */

Related concepts:

Revised and optimized HAL error management

HAL RCC CRS clear flags constants

HAL1

HAL2

In HAL1, these defines have been used by the __HAL_RCC_CRS_CLEAR_FLAG() and __HAL_RCC_CRS_GET_FLAG() macros. 

#define RCC_CRS_FLAG_SYNCOK
#define RCC_CRS_FLAG_SYNCWARN
#define RCC_CRS_FLAG_ERR
#define RCC_CRS_FLAG_ESYNC
#define RCC_CRS_FLAG_SYNCERR
#define RCC_CRS_FLAG_SYNCMISS
#define RCC_CRS_FLAG_TRIMOVF

In HAL2, these defines and macros have been removed, use LL_CRS_ClearFlag() and LL_CRS_IsActiveFlag() instead with the appropriate parameters.

HAL RCC CRS interrupt sources

HAL1

HAL2

In HAL1, those defines are used by the __HAL_RCC_CRS_ENABLE_IT(), __HAL_RCC_CRS_DISABLE_IT(), __HAL_RCC_CRS_GET_IT_SOURCE() and __HAL_RCC_CRS_CLEAR_IT() macros.

In HAL2, these defines and macros are removed, use LL_CRS_EnableIT(), LL_CRS_DisableIT(), LL_CRS_IsEnabledIT() and LL_CRS_ClearFlag() instead with the appropriate parameters. 

#define RCC_CRS_IT_SYNCOK
#define RCC_CRS_IT_SYNCWARN
#define RCC_CRS_IT_ERR
#define RCC_CRS_IT_ESYNC
#define RCC_CRS_IT_SYNCERR
#define RCC_CRS_IT_SYNCMISS
#define RCC_CRS_IT_TRIMOVF

Note

All Finite Parameter defines have been replaced with Enum Types at HAL Levels.

HAL RCC CRS sync source configuration

HAL1

HAL2 



#define RCC_CRS_SYNC_SOURCE_GPIO
#define RCC_CRS_SYNC_SOURCE_LSE
#define RCC_CRS_SYNC_SOURCE_USB
...

typedef enum
{
  HAL_CRS_SYNC_SOURCE_GPIO,
  HAL_CRS_SYNC_SOURCE_LSE,
  HAL_CRS_SYNC_SOURCE_USB
  ...
} hal_crs_sync_source_t;

Note

The synchronization sources may vary from one series to another.

HAL RCC CRS sync divider configuration

HAL1

HAL2 



#define RCC_CRS_SYNC_DIV1
#define RCC_CRS_SYNC_DIV2
#define RCC_CRS_SYNC_DIV4
#define RCC_CRS_SYNC_DIV8
#define RCC_CRS_SYNC_DIV16
#define RCC_CRS_SYNC_DIV32
#define RCC_CRS_SYNC_DIV64
#define RCC_CRS_SYNC_DIV128

typedef enum
{
  HAL_CRS_SYNC_DIV1,
  HAL_CRS_SYNC_DIV2,
  HAL_CRS_SYNC_DIV4,
  HAL_CRS_SYNC_DIV8,
  HAL_CRS_SYNC_DIV16,
  HAL_CRS_SYNC_DIV32,
  HAL_CRS_SYNC_DIV64,
  HAL_CRS_SYNC_DIV128
} hal_crs_sync_div_t;

HAL RCC CRS sync polarity configuration

HAL1

HAL2 



#define RCC_CRS_SYNC_POLARITY_RISING
#define RCC_CRS_SYNC_POLARITY_FALLING

typedef enum
{
  HAL_CRS_SYNC_POLARITY_RISING,
  HAL_CRS_SYNC_POLARITY_FALLING
} hal_crs_sync_polarity_t;

HAL RCC CRS masks

HAL1

HAL2 

#define RCC_CRS_FLAG_ERROR_MASK
#define RCC_CRS_IT_ERROR_MASK

Removed; used internally by the driver

HAL RCC CRS reload default value

HAL1

HAL2 

#define RCC_CRS_RELOADVALUE_DEFAULT

#define HAL_CRS_RELOAD_DEFAULT_VALUE

HAL RCC CRS error default value

HAL1

HAL2 

#define RCC_CRS_ERRORLIMIT_DEFAULT

#define HAL_CRS_ERRORLIMIT_DEFAULT_VALUE

HAL RCC CRS trimming default value

HAL1

HAL2 

#define RCC_CRS_HSI48CALIBRATION_DEFAULT

#define HAL_CRS_TRIMMING_DEFAULT_VALUE

HAL RCC CRS frequency error direction configuration

HAL1

HAL2 



#define RCC_CRS_FREQERRORDIR_UP
#define RCC_CRS_FREQERRORDIR_DOWN

typedef enum
{
  HAL_CRS_FREQUENCY_ERROR_DIR_UP,
  HAL_CRS_FREQUENCY_ERROR_DIR_DOWN
} hal_crs_frequency_error_dir_t;

Related concepts: